cpu performance
1:29:54CppCon 2015: Chandler Carruth "Tuning C++: Benchmarks, and CPUs, and Compilers! Oh My!"
188K views • 11 years ago
CppCon
Chandler Carruth walks through tuning C++ performance, from writing benchmarks to analyzing results on real CPUs and compilers. It focuses on small-scale problems such as loop kernels, data structures and algorithms, and on keeping compilers from optimizing benchmarks away.
59:21A Crash Course in Modern Hardware by Cliff Click
21K views • 10 years ago
Devoxx
Cliff Click walks through a small performance example on a modern out-of-order CPU. He covers pipelining, ILP, CISC vs RISC, multicore, and why cache misses and the memory subsystem dominate performance.
1:13:41CppCon 2014: Chandler Carruth "Efficiency with Algorithms, Performance with Data Structures"
235K views • 12 years ago
CppCon
Chandler Carruth's CppCon 2014 talk on writing fast C++, explaining why data structure choice and memory layout matter more than clever algorithms. It covers why standard containers like unordered_map perform poorly on modern CPUs.
2:50:14Simple Code, High Performance
463K views • 5 years ago
Molly Rocket
Casey Muratori's University of Twente guest lecture is a case study in how straightforward code can cut thousands of lines and tens of seconds of runtime down to a few dozen lines running in under a second. It uses concrete examples to show why software is often an order of magnitude slower than it should be.
1:16:58code::dive conference 2014 - Scott Meyers: Cpu Caches and Why You Care
231K views • 11 years ago
NOKIA Technology Center Wrocław
Scott Meyers explains how CPU caches work and why they matter for performance, covering cache levels, access speeds, associativity, and effects in multithreaded code. The focus is C++ and cache-aware, data-oriented programming.
1:26:50The Mill CPU Architecture - the Belt (2 of 13)
38K views • 13 years ago
Mill Computing, Inc.
The second talk in the Mill CPU series by Mill Computing, covering the Belt, the Mill's operand-passing model that replaces general registers. It explains the cost of register renaming in conventional wide CPUs and how the Belt reaches high instruction-level parallelism.
56:55AWS re:Invent 2017: How Netflix Tunes Amazon EC2 Instances for Performance (CMP325)
18K views • 8 years ago
Amazon Web Services
A Netflix performance engineer presents how Netflix tunes EC2 instances, covering instance type choice, Xen modes, SR-IOV and kernel tuning. The goal is near bare-metal performance in the cloud.
2:18What happens when the CPU cooler is removed?
388K views • 19 years ago
AdDiCt Zorz
A short 2001 Tom's Hardware clip that runs Quake 3 on several popular CPU and motherboard combinations of the era, then removes the CPU cooler to see which chips survive. It shows how different processors handle losing their heatsink or fan.
1:00:58CppCon 2017: Chandler Carruth “Going Nowhere Faster”
113K views • 9 years ago
CppCon
Chandler Carruth shows how to squeeze more performance out of already-optimized C++ code, covering how the CPU executes it. The talk goes into pipelining, branch prediction and speculative execution using benchmarks.
1:00:34High Performance Web Sites and YSlow
90K views • 18 years ago
Google TechTalks
A Google Tech Talk on Yahoo's 14 rules for faster web pages and the YSlow tool. It covers front-end practices like avoiding @import and fixing ETags, with live analysis of popular sites.
1:30:53C++Now 2018: You Can Do Better than std::unordered_map: New Improvements to Hash Table Performance
63K views • 8 years ago
CppNow
Malte Skarupke's C++Now 2018 talk on hash table performance, explaining why std::unordered_map is slow and memory hungry and presenting faster designs, including his bytell hash map.
1:01:09Plenary: Performance Matters - Emery Berger - CppCon 2020
32K views • 6 years ago
CppCon
Emery Berger's CppCon 2020 plenary on why performance is hard on modern hardware after the end of Dennard scaling. It covers benchmarking pitfalls and introduces new profiling tools for finding real bottlenecks.
2:02:18The Mill CPU Architecture – The Compiler (10 of 13)
12K views • 11 years ago
Mill Computing, Inc.
A long Mill Computing lecture on the Mill CPU's compiler toolchain, covering the specializer that targets family members, scheduling and latency passes, and the belt. It explains how the compiler handles a wide-issue, exposed-pipeline design.
22:41"Clean" Code, Horrible Performance
1.2M views • 3 years ago
Molly Rocket
Casey Muratori shows how typical 'clean code' object-oriented patterns can cost large factors in performance. He benchmarks them against simpler data-oriented code.
24:46Building a 6800 CPU on an FPGA with nMigen (part 1)
27K views • 6 years ago
Robert Baruch
The first part of Robert Baruch's series on building a 6800 CPU on an FPGA with nMigen, a Python-based hardware description language. It introduces the HDL while implementing a simpler 6800 core.
19:25New computers don't speed up old code
187K views • 1 year ago
Matthias random stuff
Matthias Wandel tests old and new code on a range of PCs, including a new mini PC, to measure how much faster modern hardware really is. He also shows optimization techniques such as branchless code, with benchmark programs on GitHub.
26:13The Smartphone CPU Review You NEED to Watch!
345K views • 4 years ago
Geekerwan
Geekerwan reviews smartphone CPUs by power efficiency rather than benchmark scores, with test methodology and chapters on Qualcomm, Apple, Samsung and Google chips. It explains why high benchmark scores can coexist with heat and poor battery life.
42:15"Performance Matters" by Emery Berger
502K views • 7 years ago
Strange Loop Conference
Emery Berger explains why performance is hard to measure and deliver on modern hardware, showing how code layout and alignment can swamp optimization effects. He presents Stabilizer for statistically sound evaluation and Coz, a causal profiler.
18:20FIXING the ENTIRE SM64 Source Code (INSANE N64 performance)
3.2M views • 4 years ago
Kaze Emanuar
Kaze Emanuar explains how he rewrote and optimized the Super Mario 64 source code so it runs far faster on real N64 hardware. He covers performance bottlenecks and fixes in detail for his ROM hacks.
35:42Progressive Performance (Chrome Dev Summit 2016)
34K views • 10 years ago
Chrome for Developers
Alex Russell's Chrome Dev Summit 2016 talk on building web experiences that work on slow, flaky networks and low-power devices. It argues developers should focus on the performance of real-world mobile hardware rather than desktop machines.
1:04:48"Performance (Really) Matters" with Emery Berger
7K views • 6 years ago
Association for Computing Machinery (ACM)
Emery Berger argues that performance is hard to measure and deliver on modern systems, showing how code layout and link order can swamp optimization effects. He presents tools that evaluate performance more reliably.
27:528-bit CPU control logic: Part 1
1.5M views • 9 years ago
Ben Eater
Ben Eater writes a program in a made-up machine language and walks through the control logic an 8-bit breadboard CPU needs to execute it. It is part of his build-an-8-bit-computer series.
56:23Speed Up Your JavaScript
136K views • 17 years ago
Google TechTalks
A 2009 Google Tech Talk by Nicholas Zakas on the hidden performance pitfalls of JavaScript. It covers what is fast and slow in the language and how to avoid common bottlenecks.
11:03Resident Evil Village PC DRM: Cracked Code Really Does Run Better - Confirmed
197K views • 5 years ago
Digital Foundry
Digital Foundry investigates why Resident Evil Village on PC runs worse with Capcom's Denuvo DRM than a cracked version. They benchmark and confirm performance and frame-pacing differences.
55:49CppCon 2016: Chandler Carruth “High Performance Code 201: Hybrid Data Structures"
119K views • 10 years ago
CppCon
Chandler Carruth's CppCon 2016 talk on designing hybrid data structures for performance. He covers cache locality, working-set size and allocation overhead, and why standard C++ containers fall short.
1:00:07CppCon 2017: Carl Cook “When a Microsecond Is an Eternity: High Performance Trading Systems in C++”
357K views • 9 years ago
CppCon
Optiver's Carl Cook explains how to build high-frequency trading systems in C++, where the critical path runs rarely but must be extremely fast. He covers techniques for low and predictable latency, including avoiding main memory and cache misses.
51:5727c3: Reverse Engineering the MOS 6502 CPU (en)
477K views • 15 years ago
Christiaan008
Michael Steil's 27c3 talk on reverse engineering the MOS 6502 from die shots into a transistor-level simulation, as in the Visual6502 project. It covers going from chip package to a digital model.
38:20Twitter and Visual Studio Rant
158K views • 6 years ago
Molly Rocket
Casey Muratori responds on-stream to a dismissive Twitter post by demonstrating how slow Visual Studio's startup and debugger watch window are, comparing it to much older software and machines. It is a long rant about software performance and bloat.
30:37High-performance Tree Wrangling, the APL Way // Aaron Hsu // Dyalog '18
6K views • 7 years ago
Dyalog User Meetings
Aaron Hsu shows how to manipulate and transform tree data in APL using arrays and inverted tables instead of pointers. He claims much smaller code, better performance and easier parallelisation.
29:47The Truth about Rust/WebAssembly Performance
218K views • 3 years ago
Greg Johnston
Leptos creator Greg Johnston examines Rust/WebAssembly frontend frameworks against JavaScript frameworks using the JS framework benchmark. He argues that WASM is no longer too slow for DOM-heavy rendering.
18:27Dan Tepfer: NPR Music Tiny Desk Concert
133K views • 7 years ago
NPR Music
A Tiny Desk concert in which pianist Dan Tepfer plays with a Disklavier player piano driven by a program he wrote that responds to his playing. He performs four pieces from his Natural Machines project.
27:48How are Microchips Made? 🖥️🛠️ CPU Manufacturing Process Steps
11.9M views • 2 years ago
Branch Education
Branch Education walks through a semiconductor fab and the dozens of steps used to turn silicon wafers into microchips, with 3D animation. It covers lithography, deposition and etching at a high level.
51:50[11] Mike Clark, AMD Zen Chief Architect
27K views • 5 years ago
TechTechPotato
Ian Cutress interviews Mike Clark, AMD's chief architect of Zen, about his career since the K5, how Zen began and how CPUs are designed. It also covers the future of AMD.
1:24:39Mojo Lang - Tomorrow's High Performance Python? (with Chris Lattner)
64K views • 2 years ago
Developer Voices
Developer Voices interviews Chris Lattner about Mojo, a Python-compatible language aimed at CPU/GPU performance built on LLVM and MLIR. It covers performance features, the type system and why Mojo uses Python syntax.
11:42AMD's most important product ever - Ryzen 9 4900HS
2.4M views • 6 years ago
Linus Tech Tips
Linus Tech Tips reviews AMD's Ryzen 9 4900HS mobile CPU in the ASUS ROG Zephyrus G14 laptop, calling it a landmark product. It highlights strong performance against Intel along with good efficiency and battery life.
21:52英特尔Lunar Lake深度评测:轻薄本有救了!
198K views • 2 years ago
极客湾Geekerwan
Geekerwan's Chinese-language review of Intel's Lunar Lake lightweight laptop chip, covering performance, perf-per-watt curves and battery life benchmarks. It tests whether x86 can compete on efficiency.
14:59Piano Phase (solo) - First solo performance ever
767K views • 15 years ago
Rob Kovacs
A solo performance of Steve Reich's Piano Phase, with one pianist playing both parts, recorded in 2004 with Reich in attendance. It is a 15-minute minimalist phasing piece.
9:10The Who - Won't Get Fooled Again (Shepperton Studios / 1978)
27.4M views • 7 years ago
TheWhoVEVO
The Who performing Won't Get Fooled Again at Shepperton Studios in 1978, filmed for The Kids Are Alright. It was Keith Moon's last performance with the band.
1:27:46CppCon 2014: Mike Acton "Data-Oriented Design and C++"
862K views • 12 years ago
CppCon
Mike Acton of Insomniac Games argues that a program's purpose is transforming data, and shows how common C++ approaches work against that in performance-critical game development. He covers cache behavior, data layout and the limits of compilers.
1:04:53Jim Keller: Moore’s Law is Not Dead
77K views • 7 years ago
UC Berkeley EECS
Jim Keller gives a UC Berkeley EECS colloquium arguing that Moore's Law is not dead. He surveys upcoming technologies and the multiple innovation curves that can keep transistor density and performance scaling.