Building AI Silicon
TenstorrentCited 4× on HN, 2022-2022
17K views · 4 years ago · talk · dated
Jim Keller, CTO of Tenstorrent, talks at Samsung Foundry's SAFE 2021 about building AI silicon through modular, provable design. The talk also touches on Tenstorrent's RISC-V Ascalon core.
HN cites it as a source on Tenstorrent's wide-issue RISC-V Ascalon CPU in RISC-V threads.
56:54Change w/ Jim Keller
Tenstorrent
61K views • 3 years ago
23:32Industrial Strength High Performance RISC V Processors For Energy Efficient Computing
RISC-V International
8K views • 8 years ago
1:05:28HC2023-K2: Hardware for Deep Learning
hotchipsvideos
15K views • 3 years ago
![[7] Jim Keller, Silicon Wizard 🧙♂️](https://i.ytimg.com/vi/AFVDZeg4RVY/hq2.jpg)
1:37:12[7] Jim Keller, Silicon Wizard 🧙♂️
TechTechPotato
67K views • 5 years ago
37:47Experiences Building Edge TPU with Chisel
Chisel
11K views • 7 years ago
21:42Future Computers Will Be Radically Different (Analog Computing)
Veritasium
13.2M views • 4 years ago
31:06Jim Keller - Moore's Law in the age of AI Chips
Matroid
33K views • 6 years ago
32:08Tuesday @ 1130 ISA Shootout – a Comparison of RISC V, ARM, and x86 Chris Celio, UC Berkeley V2
RISC-V International
50K views • 10 years ago
1:19:38John Hennessy and David Patterson 2017 ACM A.M. Turing Award Lecture
Association for Computing Machinery (ACM)
150K views • 8 years ago
35:45RAAIS 2017 - Simon Knowles, Co-Founder and CTO of Graphcore
The Research and Applied AI Summit - RAAIS
7K views • 9 years ago
24:46Building a 6800 CPU on an FPGA with nMigen (part 1)
Robert Baruch
27K views • 6 years ago
17:39Linus builds Linus’ new PC!
Linus Tech Tips
3.7M views • 6 years ago
1:10:58Trends in Deep Learning Hardware: Bill Dally (NVIDIA)
Paul G. Allen School
32K views • 2 years ago
1:26:02Stanford Seminar - The Soul of a New Machine: Rethinking the Computer
Stanford Online
76K views • 6 years ago
17:55Building the Software 2 0 Stack (Andrej Karpathy)
Databricks
73K views • 8 years ago
52:21ASPLOS Keynote: The Golden Age of Compiler Design in an Era of HW/SW Co-design by Dr. Chris Lattner
SiFive
52K views • 5 years ago
14:30I have some things to say - Core i9 & X299
Linus Tech Tips
2.8M views • 9 years ago
1:06:20Lars Bak - The Making of a Secure and Robust IoT Development Platform
Curry On!
3K views • 7 years ago
46:36Sophie Wilson - The Future of Microprocessors
Erlang Solutions
57K views • 9 years ago
42:13Clojure is Not Afraid of the GPU - Dragan Djuric
ClojureTV
7K views • 9 years ago
4 comments from Hacker News
They're apparently working on one, in-house[0]. It's apparently called Ascalon, and there's some information starting at around 8 minutes into the video. 0. ▶ this video
Jim Keller is overseeing a very large RISC-V core that should be around the same performance level as X1 or Zen 3. I guess we'll see what the ISA can do pretty soon. He said they were talking about open-sourcing the CPU block. If they did (the CPU isn't their core business), we could see lots of RISC-V competition popping up. The age of CPUs being commodity items seems to be approaching. ▶ this video
Jim Keller's team is creating a 6-wide issue RISC-V CPU. It should have similar IPC as ARM X1 or AMD Zen 3. ▶ this video
Jim Keller is building RISC-V Ascalon processor at Tenstorrent right now. ▶ this video If I recall correctly, some things were planned to be open sourced.