risc-v

David Ditzel of Esperanto Technologies presents their massively parallel, energy-efficient RISC-V processors at the 7th RISC-V Workshop in 2017. It covers the high-performance many-core design aimed at machine learning.

Chris Celio of UC Berkeley compares the RISC-V, ARM and x86 instruction sets, with quantitative data on instruction counts and code density. It examines how the compressed extension fares against Thumb and x86.

Jim Keller, CTO of Tenstorrent, talks at Samsung Foundry's SAFE 2021 about building AI silicon through modular, provable design. The talk also touches on Tenstorrent's RISC-V Ascalon core.

A one-minute clip from the 1995 film Hackers in which characters trade technobabble about RISC architecture changing everything.

Jeff Geerling interviews Raspberry Pi co-founder Eben Upton about the Pi shortage, the RP2040, RISC-V, the Sony investment and the origin of the name.

Dave Jaggar, who defined much of the ARM architecture, recounts how Acorn's near-extinction led to ARM, including the history of Thumb, StrongARM, and the Austin team.

David Patterson's talk on the history of computer architecture, from RISC and superscalar designs to the end of Dennard scaling and Moore's Law. It argues that domain-specific architectures and open instruction sets open a new golden age.

Hennessy and Patterson's 2018 Turing Award lecture at ISCA, A New Golden Age for Computer Architecture. It covers domain-specific hardware, security, open instruction sets and agile chip development.

Ian Cutress interviews chip architect Jim Keller about his time at AMD, Intel and elsewhere, management advice, design approach, Moore's Law and x86 versus Arm.

Chris Lattner's ASPLOS 2021 keynote on the golden age of compiler design in an era of hardware and software co-design, covering compiler infrastructure for accelerators and unifying hardware IRs.

Bryan Cantrill of Oxide Computer Company gives a Stanford EE380 talk on rethinking the server. He argues that hyperscaler-style rack-scale machines with open firmware, RISC-V and Rust should be available to everyone, not just the giants.

Cliff Click walks through a small performance example on a modern out-of-order CPU. He covers pipelining, ILP, CISC vs RISC, multicore, and why cache misses and the memory subsystem dominate performance.

Ben Eater's short update announcing his plan to build another 8-bit computer from scratch on camera. It kicks off the breadboard computer series that became widely known.

Robert Wills of TNMoC explains the Apollo Guidance Computer hardware and software, then walks through the Apollo 11 landing procedure step by step, including the 1202 alarms.

Ben Eater starts a series building a working computer on breadboards around the 6502 microprocessor. In this first part he gets a 'hello world' running from scratch.

R. Stanley Williams of HP Labs gives a keynote on the memristor, covering the physics, crossbar computation, and potential for memory and new computer architectures.

Casey Muratori's long talk arguing that modern software has ballooned to tens of millions of lines because of hardware and OS diversity. He proposes a stable ISA for entire system-on-a-chip packages and recalls when games shipped with their own boot disk.

Michael Steil's 33c3 talk explains essentially everything about the Game Boy: CPU, video hardware, peripherals, and the tricks used by games and demos. It revives the era of counting clock cycles around hardware limits.

Timothy Roscoe of ETH Zurich delivers the joint USENIX ATC/OSDI 2021 keynote arguing that operating systems must reckon with modern hardware, which is a heterogeneous collection of processors, firmware and coprocessors rather than a simple machine. It shows how much runs below and beside Linux.

Lex Fridman interviews legendary chip architect Jim Keller about Moore's Law, microprocessor design, and first-principles thinking. Keller draws on his work at AMD, Apple, Tesla and Intel, discussing instruction sets, transistor budgets, and self-driving.

Michael Steil and Christian Hessmann's 34C3 talk explaining the Apollo Guidance Computer end to end: hardware design, operating system, and mission software.

Jim Keller gives a UC Berkeley EECS colloquium arguing that Moore's Law is not dead. He surveys upcoming technologies and the multiple innovation curves that can keep transistor density and performance scaling.

Chuck Moore, inventor of Forth, presents GreenArrays' 144-core asynchronous chip at Strange Loop 2013. He explains how idle cores draw almost no power and how tight code minimizes energy use.

Tom Murphy (suckerpinch) presents a deliberately trollish computer architecture built on IEEE-754 floating point, using NaN and infinity to define logic gates. He builds working hardware around the idea.

Christopher Domas presents at Black Hat 2017 how page fault analysis and processor fuzzing can exhaustively search the x86 instruction set. The talk uncovers undocumented instructions and hardware bugs and shows limits of disassemblers.

Microsoft's Tony Chen explains how the Xbox One was designed to resist physical attacks, including secure boot, encrypted memory, a security processor and a hypervisor. The goal was to make any hardware attack cost more than the price of many games.

A lecture by Richard Feynman on how computers work, using the analogy of a filing clerk that becomes progressively dumber and faster. It also covers heuristics and how computers handle data and solve problems in finite time.

Casey Muratori's University of Twente guest lecture is a case study in how straightforward code can cut thousands of lines and tens of seconds of runtime down to a few dozen lines running in under a second. It uses concrete examples to show why software is often an order of magnitude slower than it should be.

Ben Eater explains how a USB keyboard communicates, covering the electrical interface, bit and packet encoding, packet contents, and a comparison with PS/2.

Herb Sutter's deep C++ and Beyond 2012 talk on atomics and the C++ memory model, covering why programmers chasing top performance need to understand hardware ordering. This is part one of two.

Dave Ackley demonstrates the Demon Horde Sort, an inherently robust sorting machine running in his Movable Feast Machine simulator. This is the uncut version with all details and side thoughts.

The 8-Bit Guy covers IBM's 1981 CGA graphics system, including how composite output and artifacting produced extra colors beyond the nominal palette. He argues CGA looked better in period than it does on RGB monitors.

Overclocker der8auer tours Hetzner's Falkenstein data center in Germany, showing custom racks, own mainboards, passively cooled servers and ATX-style cases on shelves.

Cliff Click of Azul Systems gives a Google Tech Talk on running Java business applications on a machine with about a thousand cores. He covers hardware and software codesign, including garbage collection hardware and the JIT.

Admiral Grace Hopper holds up a length of wire to show how far light travels in a nanosecond, about 11.8 inches. She explains how she made the idea concrete to people who could not picture a billionth of a second.

Veritasium explains why analog computing may suit AI workloads, covering old analog computers, The Analog Thing and Mythic's analog chips that use flash memory for neural network inference. It argues digital hardware is hitting limits.

SpaceX engineers present at NVIDIA's GPU Technology Conference on a multi-physics code that simulates the full-scale Raptor methane engine. It covers GPU-based turbulent combustion modeling with adaptive grids and wavelet compression.

Simon Peyton Jones explains nested data parallelism and Data Parallel Haskell, an approach to exploiting multicore and distributed hardware while keeping a simple single-control-flow programming model.

A 36-minute animated deep dive from Branch Education into how DRAM works. It shows how memory connects to the CPU and how billions of bits are stored in nanoscale capacitor cells. It also covers why DRAM sits between SSDs and the processor.

PS5 lead system architect Mark Cerny gives a deep dive into the PS5's architecture, covering its SSD, I/O, audio and design goals. He explains how removing bottlenecks shapes future games.