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code::dive conference 2014 - Scott Meyers: Cpu Caches and Why You Care1:16:58

code::dive conference 2014 - Scott Meyers: Cpu Caches and Why You Care

231K views • 11 years ago
NOKIA Technology Center Wrocław
Scott Meyers explains how CPU caches work and why they matter for performance, covering cache levels, access speeds, associativity, and effects in multithreaded code. The focus is C++ and cache-aware, data-oriented programming.
Bryan Cantrill on ARC: A Self-Tuning, Low Overhead Replacement Cache [PWL SF] 10/20171:47:35

Bryan Cantrill on ARC: A Self-Tuning, Low Overhead Replacement Cache [PWL SF] 10/2017

13K views • 9 years ago
PapersWeLove
Bryan Cantrill presents the ARC (Adaptive Replacement Cache) paper by Megiddo and Modha at Papers We Love. He opens with a survey of caching strategies before digging into the self-tuning LRU/MFU design.
CppCon 2017: Matt Kulukundis “Designing a Fast, Efficient, Cache-friendly Hash Table, Step by Step”59:34

CppCon 2017: Matt Kulukundis “Designing a Fast, Efficient, Cache-friendly Hash Table, Step by Step”

137K views • 9 years ago
CppCon
Matt Kulukundis explains how Google designed SwissTable, a fast, cache-friendly hash table, step by step from std::unordered_map. The talk covers open addressing, SIMD probing and the tradeoffs of changing a fundamental data structure.
A Crash Course in Modern Hardware by Cliff Click59:21

A Crash Course in Modern Hardware by Cliff Click

21K views • 9 years ago
Devoxx
Cliff Click walks through a small performance example on a modern out-of-order CPU. He covers pipelining, ILP, CISC vs RISC, multicore, and why cache misses and the memory subsystem dominate performance.
Topic match · Computer architecture & CPUs
CppCon 2014: Mike Acton "Data-Oriented Design and C++"1:27:46

CppCon 2014: Mike Acton "Data-Oriented Design and C++"

862K views • 12 years ago
CppCon
Mike Acton of Insomniac Games argues that a program's purpose is transforming data, and shows how common C++ approaches work against that in performance-critical game development. He covers cache behavior, data layout and the limits of compilers.
Topic match · Software performance & optimization
CppCon 2014: Chandler Carruth "Efficiency with Algorithms, Performance with Data Structures"1:13:41

CppCon 2014: Chandler Carruth "Efficiency with Algorithms, Performance with Data Structures"

235K views • 12 years ago
CppCon
Chandler Carruth's CppCon 2014 talk on writing fast C++, explaining why data structure choice and memory layout matter more than clever algorithms. It covers why standard containers like unordered_map perform poorly on modern CPUs.
Topic match · Software performance & optimization
CppCon 2017: Carl Cook “When a Microsecond Is an Eternity: High Performance Trading Systems in C++”1:00:07

CppCon 2017: Carl Cook “When a Microsecond Is an Eternity: High Performance Trading Systems in C++”

357K views • 9 years ago
CppCon
Optiver's Carl Cook explains how to build high-frequency trading systems in C++, where the critical path runs rarely but must be extremely fast. He covers techniques for low and predictable latency, including avoiding main memory and cache misses.
Topic match · Software performance & optimization
Andrew Kelley: A Practical Guide to Applying Data Oriented Design (DoD)46:40

Andrew Kelley: A Practical Guide to Applying Data Oriented Design (DoD)

415K views • 2 years ago
ChimiChanga
Andrew Kelley, creator of Zig, presents practical data-oriented design techniques for shrinking memory footprint and making programs cache friendly. He ends with a case study of how these ideas sped up the Zig compiler.
Topic match · Software performance & optimization
CppCon 2019: Matt Godbolt “Path Tracing Three Ways: A Study of C++ Style”55:42

CppCon 2019: Matt Godbolt “Path Tracing Three Ways: A Study of C++ Style”

77K views • 7 years ago
CppCon
Matt Godbolt builds a toy path tracer in C++ in three different styles and compares them on clarity, testability, compile time and run-time performance. The talk was given at CppCon 2019.
Topic match · Software performance & optimization
CppCon 2016: Chandler Carruth “High Performance Code 201: Hybrid Data Structures"55:49

CppCon 2016: Chandler Carruth “High Performance Code 201: Hybrid Data Structures"

119K views • 10 years ago
CppCon
Chandler Carruth's CppCon 2016 talk on designing hybrid data structures for performance. He covers cache locality, working-set size and allocation overhead, and why standard C++ containers fall short.
Topic match · Software performance & optimization
CppCon 2018: G. Nishanov “Nano-coroutines to the Rescue! (Using Coroutines TS, of Course)”1:04:26

CppCon 2018: G. Nishanov “Nano-coroutines to the Rescue! (Using Coroutines TS, of Course)”

40K views • 8 years ago
CppCon
Gor Nishanov's CppCon 2018 talk on using tiny C++ coroutines to hide memory latency, interleaving useful work while prefetches bring cache lines in from main memory.
Topic match · Software performance & optimization
CppCon 2017: Fedor Pikus “C++ atomics, from basic to advanced.  What do they really do?”1:14:22

CppCon 2017: Fedor Pikus “C++ atomics, from basic to advanced. What do they really do?”

288K views • 9 years ago
CppCon
Fedor Pikus's CppCon 2017 talk on C++ atomics, looking at what they let the programmer express and what the hardware actually does. It covers memory ordering and lock-free programming from basic to advanced.
Topic match · Computer architecture & CPUs
How to Speed up a Python Program 114,000 times.59:11

How to Speed up a Python Program 114,000 times.

171K views • 13 years ago
InfoQ
David Schachter describes how he made a data-collection Python program run 114,000 times faster, drawing on decades of experience. The talk covers pipelining, cache effects and other optimization lessons.
Topic match · Software performance & optimization
FreeBSD optimizations used by Netflix serving at 800Gb/s - Drew Gallatin - EuroBSDcon 202244:05

FreeBSD optimizations used by Netflix serving at 800Gb/s - Drew Gallatin - EuroBSDcon 2022

28K views • 4 years ago
EuroBSDCon
Netflix engineer Drew Gallatin's EuroBSDcon 2022 talk quantifies the older FreeBSD optimizations that let Netflix serve web traffic at 800Gb/s, including TSO, LRO, VM page cache zones, asynchronous sendfile and unmapped mbufs.
Topic match · Software performance & optimization
[Minecraft Computer Engineering] - Quad-Core Redstone Computer v5.0 [12k sub special!]31:17

[Minecraft Computer Engineering] - Quad-Core Redstone Computer v5.0 [12k sub special!]

3.6M views • 7 years ago
legomasta99
A showcase of the author's fifth-generation quad-core computer built entirely from Minecraft redstone, after two years of development. It features cache, a hardware stack, a GPU driving a 15x15 display, and serial I/O ports.
Topic match · Computer architecture & CPUs
Your web app but good: Aaron Boodman (Local-First Conf)19:36

Your web app but good: Aaron Boodman (Local-First Conf)

8K views • 2 years ago
Local-First Conf
Aaron Boodman of Replicache asks why sync engines have not yet fixed web app complexity and what is missing for them to go mainstream. The talk lays out the ideas that led to the Zero sync engine.
How Python was Shaped by leaky Internals, Armin Ronacher, Flask framework49:55

How Python was Shaped by leaky Internals, Armin Ronacher, Flask framework

20K views • 10 years ago
Видео с мероприятий {speach!
Armin Ronacher, creator of Flask, explains how CPython's internals and C API leak into the language's semantics. Using examples like the complexity of the add operation, he shows why Python is hard to optimize or reimplement.
Topic match · Software performance & optimization
8-bit computer update6:53

8-bit computer update

2.8M views • 10 years ago
Ben Eater
Ben Eater's short update announcing his plan to build another 8-bit computer from scratch on camera. It kicks off the breadboard computer series that became widely known.
Topic match · Computer architecture & CPUs
CppCon 2015: Andrei Alexandrescu “std::allocator...”1:12:27

CppCon 2015: Andrei Alexandrescu “std::allocator...”

196K views • 11 years ago
CppCon
Andrei Alexandrescu's CppCon 2015 talk argues that std::allocator is badly designed. He proposes building high-performance allocators from small composable, templated pieces.
Topic match · Software performance & optimization
Light Years Ahead | The 1969 Apollo Guidance Computer1:21:22

Light Years Ahead | The 1969 Apollo Guidance Computer

2.8M views • 6 years ago
TNMoC
Robert Wills of TNMoC explains the Apollo Guidance Computer hardware and software, then walks through the Apollo 11 landing procedure step by step, including the 1202 alarms.
Topic match · Computer architecture & CPUs
“Hello, world” from scratch on a 6502 — Part 127:25

“Hello, world” from scratch on a 6502 — Part 1

5.9M views • 7 years ago
Ben Eater
Ben Eater starts a series building a working computer on breadboards around the 6502 microprocessor. In this first part he gets a 'hello world' running from scratch.
Topic match · Computer architecture & CPUs
Preventing the Collapse of Civilization / Jonathan Blow (Thekla, Inc)1:02:42

Preventing the Collapse of Civilization / Jonathan Blow (Thekla, Inc)

315K views • 7 years ago
DevGAMM
A DevGAMM talk by Jonathan Blow arguing that civilizations can lose technological capability and that software quality is already deteriorating. He discusses how knowledge fails to transfer between generations.
Topic match · Software performance & optimization
Finding the Missing Memristor - R. Stanley Williams47:52

Finding the Missing Memristor - R. Stanley Williams

133K views • 16 years ago
The Qualcomm Institute
R. Stanley Williams of HP Labs gives a keynote on the memristor, covering the physics, crossbar computation, and potential for memory and new computer architectures.
Topic match · Computer architecture & CPUs
"Performance Matters" by Emery Berger42:15

"Performance Matters" by Emery Berger

502K views • 7 years ago
Strange Loop Conference
Emery Berger explains why performance is hard to measure and deliver on modern hardware, showing how code layout and alignment can swamp optimization effects. He presents Stabilizer for statistically sound evaluation and Coz, a causal profiler.
Topic match · Software performance & optimization
The Thirty Million Line Problem1:48:55

The Thirty Million Line Problem

326K views • 8 years ago
Molly Rocket
Casey Muratori's long talk arguing that modern software has ballooned to tens of millions of lines because of hardware and OS diversity. He proposes a stable ISA for entire system-on-a-chip packages and recalls when games shipped with their own boot disk.
Topic match · Software performance & optimization
The Ultimate Game Boy Talk (33c3)1:01:07

The Ultimate Game Boy Talk (33c3)

241K views • 9 years ago
media.ccc.de
Michael Steil's 33c3 talk explains essentially everything about the Game Boy: CPU, video hardware, peripherals, and the tricks used by games and demos. It revives the era of counting clock cycles around hardware limits.
Topic match · Computer architecture & CPUs
Erlang Factory 2014 - That's 'Billion' with a 'B': Scaling to the Next Level at WhatsApp49:15

Erlang Factory 2014 - That's 'Billion' with a 'B': Scaling to the Next Level at WhatsApp

50K views • 12 years ago
Erlang Solutions
Rick Reed of WhatsApp explains at Erlang Factory 2014 how the service scaled to billions of messages with a very small engineering team. He covers the FreeBSD and Erlang stack, Mnesia usage, server counts and bottleneck work.
Topic match · Software performance & optimization
How Crash Bandicoot Hacked The Original Playstation | War Stories | Ars Technica31:37

How Crash Bandicoot Hacked The Original Playstation | War Stories | Ars Technica

5.2M views • 6 years ago
Ars Technica
In Ars Technica's War Stories, Naughty Dog co-founder Andy Gavin explains how the team squeezed Crash Bandicoot onto the original PlayStation. They overwrote Sony library code in RAM, built custom animation compression, and streamed assets around slow seek times.
Topic match · Software performance & optimization
"How NOT to Measure Latency" by Gil Tene42:59

"How NOT to Measure Latency" by Gil Tene

119K views • 11 years ago
Strange Loop Conference
Gil Tene of Azul Systems explains common pitfalls in measuring latency and response time, including why averages mislead and the problem of coordinated omission. He introduces open source tools like HdrHistogram for better measurement and reporting.
Topic match · Software performance & optimization
Refterm Lecture Part 1 - Philosophies of Optimization18:41

Refterm Lecture Part 1 - Philosophies of Optimization

93K views • 5 years ago
Molly Rocket
Casey Muratori's first refterm lecture lays out philosophies of optimization, distinguishing optimization from non-pessimization, which means avoiding needless work. It uses his fast terminal renderer project to show how fast computers really are.
Topic match · Software performance & optimization
USENIX ATC '21/OSDI '21 Joint Keynote Address-It's Time for Operating Systems to Rediscover Hardware1:06:20

USENIX ATC '21/OSDI '21 Joint Keynote Address-It's Time for Operating Systems to Rediscover Hardware

46K views • 5 years ago
USENIX
Timothy Roscoe of ETH Zurich delivers the joint USENIX ATC/OSDI 2021 keynote arguing that operating systems must reckon with modern hardware, which is a heterogeneous collection of processors, firmware and coprocessors rather than a simple machine. It shows how much runs below and beside Linux.
Topic match · Computer architecture & CPUs
Jim Keller: Moore's Law, Microprocessors, and First Principles | Lex Fridman Podcast #701:34:44

Jim Keller: Moore's Law, Microprocessors, and First Principles | Lex Fridman Podcast #70

742K views • 6 years ago
Lex Fridman
Lex Fridman interviews legendary chip architect Jim Keller about Moore's Law, microprocessor design, and first-principles thinking. Keller draws on his work at AMD, Apple, Tesla and Intel, discussing instruction sets, transistor budgets, and self-driving.
Topic match · Computer architecture & CPUs
34C3 -  The Ultimate Apollo Guidance Computer Talk1:01:42

34C3 - The Ultimate Apollo Guidance Computer Talk

324K views • 8 years ago
media.ccc.de
Michael Steil and Christian Hessmann's 34C3 talk explaining the Apollo Guidance Computer end to end: hardware design, operating system, and mission software.
Topic match · Computer architecture & CPUs
Jim Keller: Moore’s Law is Not Dead1:04:53

Jim Keller: Moore’s Law is Not Dead

77K views • 7 years ago
UC Berkeley EECS
Jim Keller gives a UC Berkeley EECS colloquium arguing that Moore's Law is not dead. He surveys upcoming technologies and the multiple innovation curves that can keep transistor density and performance scaling.
Topic match · Computer architecture & CPUs
Jonathan Blow - Preventing the Collapse of Civilization (English only)1:04:41

Jonathan Blow - Preventing the Collapse of Civilization (English only)

268K views • 7 years ago
bus
Jonathan Blow's DevGAMM 2019 talk argues that software knowledge is being lost between generations and that growing layers of abstraction could lead to a decline in technological civilization.
Topic match · Software performance & optimization
"Programming a 144-computer chip to minimize power" - Chuck Moore (2013)40:13

"Programming a 144-computer chip to minimize power" - Chuck Moore (2013)

19K views • 5 years ago
Strange Loop Conference
Chuck Moore, inventor of Forth, presents GreenArrays' 144-core asynchronous chip at Strange Loop 2013. He explains how idle cores draw almost no power and how tight code minimizes energy use.
Topic match · Computer architecture & CPUs
Casey Muratori – The Big OOPs: Anatomy of a Thirty-five-year Mistake – BSC 20252:27:34

Casey Muratori – The Big OOPs: Anatomy of a Thirty-five-year Mistake – BSC 2025

926K views • 1 year ago
Better Software Conference
Casey Muratori's two-hour talk tracing the history of object-oriented programming back to the 1960s and examining how its ideas, and later entity component systems, came about. It is followed by a Q&A.
Topic match · Software performance & optimization
NaN Gates and Flip FLOPS19:08

NaN Gates and Flip FLOPS

314K views • 7 years ago
suckerpinch
Tom Murphy (suckerpinch) presents a deliberately trollish computer architecture built on IEEE-754 floating point, using NaN and infinity to define logic gates. He builds working hardware around the idea.
Topic match · Computer architecture & CPUs
Breaking the x86 Instruction Set44:29

Breaking the x86 Instruction Set

381K views • 9 years ago
Black Hat
Christopher Domas presents at Black Hat 2017 how page fault analysis and processor fuzzing can exhaustively search the x86 instruction set. The talk uncovers undocumented instructions and hardware bugs and shows limits of disassemblers.
Topic match · Computer architecture & CPUs
Guarding Against Physical Attacks: The Xbox One Story — Tony Chen, Microsoft58:05

Guarding Against Physical Attacks: The Xbox One Story — Tony Chen, Microsoft

95K views • 7 years ago
Platform Security Summit
Microsoft's Tony Chen explains how the Xbox One was designed to resist physical attacks, including secure boot, encrypted memory, a security processor and a hypervisor. The goal was to make any hardware attack cost more than the price of many games.
Topic match · Computer architecture & CPUs